||Domain-specific Language for Data-driven Design Time Analyses and Result Mappings for Logic Programs
||In today's connected world, exchanging data is essential to many business applications. In order to cope with security requirements early, design time data flow analyses have been proposed. These approaches transform the modeled architecture into underlying formalisms such as logic programs. Constraints that check requirements often have to be formulated in terms of the underlying formalism. This requires architects to know about the formalism, the transformed architecture and the verification environment. We aim to bridge this gap between the architectural domain and the underlying formalism. We propose a domain-specific language (DSL) which enables architects to define individual constraints in terms of the architecture. Our approach maps the constraints and results between the architectural and the formalism automatically. Our evaluation indicates good overall expressiveness, usability and space efficiency for different sized data flow restrictions.
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Teilnahme von Prof. Reussner am 16.01.20 und 15.05.20 durch Sekretariat bestätigt